Day 12
I. Last Time:
Hw #3 Posted!!
A. Add and Sub insts (and unsigned)
B. Register Names: Registers have both a symbolic and a numeric Name
Numeric name: $<number>
$0 - $zero - Register[0]
$1 - $at - Register[1]
$2 - $v0 - Register[2]
// v1,a0-a3,
$8 - $t0 - Register[8] "T emporaries"
$9 - $t1 - Register[9]
...
$15 - $t7 - Register[15]
$16 - $s0 - Register[16] "S tatic"
$17 - $s1 - Register[17]
...
$23 - $s7 - Register[23]
$24 - $t8 - Register[24]
$25 - $t9 - Register[25]
C. R-Format Instructions
R-format instructions -
Working between registers only - all data comes
from a register
R-Format:
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits
op code rs rt rd shamt func
II. New Stuff:
A. Retreiving from Memory: lw
lw - load a WORD (32-bits for MIPS) out of memory
Syntax/Format: lw dest, offset(index)
Meaning: Read the Word that begins at Memory[offset+reg[index]]
and put into the dest register.
Offset is a number (specifically a 16-bit signed number)
Example: lw $s0, 4($s1)
Means get the word that's 4 bytes past the address(index)
contained in $s1
Ex: Using a Big Endian Machine!!!
Mem[0] = 0x00
Mem[1] = 0x00
Mem[2] = 0x02
Mem[3] = 0x01
Mem[4] = 0x00
Mem[5] = 0x00
Mem[6] = 0x02
Mem[7] = 0x04
Mem[8] = 0x00
Mem[9] = 0x00
Mem[10] = 0x01
Mem[11] = 0x01
Q. If register s1 contains 0:
What's the reqult of lw $s2,0($s1) -> s2=0x201
lw $s3,4($s1) -> s3=0x204
Q. If register s1 contains 4:
What's the result of lw $s2,0($s1) -> s2=0x204
lw $s3,4($s1) -> s2=0x101
Q. If register s1 contains 4:
What's the result of lw $s2,-4($s1) -> s2=0x201
Q. What if this was a Little Endian Machine instead?
NOTE: This just "copies" out of memory into the register
(A data movement command)
B. Putting data back into memory: sw
sw - store a WORD (32-bits for MIPS) from reg into mem
Syntax/Format: sw src, offset(index)
Meaning: Store the Word from the register into
Memory[offset+reg[index]]
Example: sw $s0, 4($s1)
Means copy what's in register $so into the
word of memory begining at Mem[4+reg[s1]].
Q. What happens when: sw $s3,0($s1)
sw $s3,-4($s1)
C. Simple Math & Arrays:
From Book: A[8]=h+A[8].
h is in register s2, A's "Base Address" is in $s3
A is an array of WORDS
1. Retrieve A[8]:
lw $s4,32($s3) # s4 = A[8]. (8th word = 4*8 bytes = 32)
2. Add:
add $s4,$s4,$s2 # s4=h+A[8]
3. Store:
sw $s4,32($s3) # A[8]=h+A[8]
g=h+A[i]
A's "base" (Address) is in $s3
g,h,i in $s1,$s2, and $s4
1. Compute Address:
add $s1,$s4,$s4 # s1=i+i=2*i
add $s1,$s1,$s1 # s1=s1+s1=2*s1=2*2*i = 4i
add $s1,$s1,$s3 # s1=s1+Base of A = A+4i
2. Load A[i]
lw $s1,0($s1) # Load A[i]
3. Add h to A[i]:
add $s1,$s2,$s1 # g=h+A[i]
D. I-Format Instructions -
Immeadiate data - Some Data is included in
the instructions. Data Manipulation and some
control instructions
I-Format Instructions: Immediate data is encoded within the
instruction itself.
Ex: Lw & Sw, The OFFSET is a part of the instruction!!!
(I.e. immeadiately available)
Format:
6 bits 5 bits 5 bits 16 bits
op code rs rt Immediate data
Ex:
lw $s4,32($s3) # s4 = A[8]. (8th word = 4*8 bytes = 32)
lw op = 35d = 10 0011b
rs = $s3 = $19 = 1 0011b
rt = $s4 = $20 = 1 0100b
offset = 32 = 10 0000b = 0000 0000 0010 0000b (16-bit)
10 0011 | 1 0011 | 1 0100 | 0000 0000 0010 0000b
1000 1110 0111 0100 0000 0000 0010 0000b
0x8E740020
NOTE: The immediate data is limited to 16 bits.
So, the largest value is 64k unsigned, -32k-32K signed.
NOTE: We can also "reverse" the process.
E. Misc. Working with Bytes: lb & sb can be used to
load and store bytes in the same way that lw & sw
can be used to store words.
Differences: No Word Alignment Constraints
Loads byte into LOWER byte of reg, rest is 0
Stores byte from LOWER byte of reg
F. Alignment: MIPS designers designed the machine around
"aligned" words - lw and sw can ONLY access words that
are on an address/index that is a multiple of 4.
Shortcut test: If you're given an address in binary/hex,
just check to see if the last 2 digits are
0s. Ex: 0xACD487A = ...1010 (Bad)
0xACD487C = ... 1100 (Good)
Things that won't work: if $s0=0 and $s1=1:
lw $s4,0($s1), lw $s4,1($s1), lw $s4,1($s0), etc.
There are some good reasons for this choice.
(And it typically doesn't really waste much space)
We'll see one advantage of this later in the jump instruction
NOTE: This is only true with WORDS: lw, sw.
(lb, sb don't have any problems)
G. Basic Structure/Syntax of an assembler program:
1. A program in a text File
2. Give Text File to Assembler to convert to Machine Lang. (typ)
In Our case - The simulator we use (SPIM) also acts as an Assembler
1. Comments: # to end of line (like // in C++)
(Don't tell me WHAT you're doing, tell me WHY!)
We don't have "data types" or relevant variable names
in ASM, we even re-use single variables for a lot of
different tasks. Good commenting is absolutely vital!!!
2. Commands:
Simple Instructions, 1 per line
(eol = terminator (like ; in C++))
Each Inst. has a specific format
(Like C++ keywords: add, lw, sw, sub, or, etc.)
3. Directives:
Special "notices" to the assembler.
Begin with a period (.)
(Similiar to #defines in C++)
4. Constants:
Numbers/characters embedded in the program:
Characters: in Quotes: "This is text"
Decimal Numbers: Just the number: 45
Hex Numbers: Preceeded by a 0x Ex: 0x12AC
Labels: Like labels in C/C++ character name
using normal identifier conventions, followed
by a colon. (Ex: default: )
5. Spacing/Indentation - 1 command per line.
Try to make clear.
6. Case: case sensetive to commands
7. Register Names: Registers have both a symbolic and a numeric Name
Numeric name: $<number>
$0 - $zero - Register[0]
$1 - $at - Register[1]
$2 - $v0 - Register[2]
// v1,a0-a3,
$8 - $t0 - Register[8]
$9 - $t1 - Register[9]
...
$15 - $t7 - Register[15]
$16 - $s0 - Register[16]
$17 - $s1 - Register[17]
...
$23 - $s7 - Register[23]
$24 - $t8 - Register[24]
$25 - $t9 - Register[25]
We'll only work with the "s-registers" today
Names established to enforce usage conventions so
different assembly programmers can work together.
We'll discuss these usage conventions next week.
They are established to ensure that modules written
by different programmers will successfully work
together. They are NOT enforced by the hardware but
they WILL be enforced by me.
III. Next Time:
C. Continue with ASM