I. Last Time:
   Lab #4 Due - Late / Corrections accepted until Fri!!!

   A. State Machines & How to build them
      A machine with some sort of "State" or condition.
         NS Going / EW Going

         Combinational logic feeding into memory.
         Memory stores the state.
         Combinational part computes the outputs and next state

        1. The state diagram:
           Used to graphically describe a machine. 
           A bubble is a "state" I.e. some important status 
           of the machine. 

           Arcs connect states - they describe what conditions cause
           the machine to enter another "state". Arcs are labeled with
           the conditions that cause the transition.

           A diagram where bubbles represent "states"
           Bubbles/states are often given names and if a specific
           output is associated with the state it is also indicated.

        2. State Table: Table describing intputs and output of 
           the combinational logic (table)

        3. Once in table form, each "state" can be given a unique
           encoding. There are a lot of possible choices:
               One-Hot. Each State has a "TRUE" bit. 
                  Ex: if there are 3 states: 001 means state 1
                      010 means state 2, 100 means state 3.
               Binary Encoding: 3 states: 00, 01, and 10
           Choice of encoding is more of an art than a science.
           Different encodings have very different impacts on the 
           circuits usually.

        4. Give binary values to all other inputs/outputs

        5. Now that the table is in "binary" we can write out equations:
              1 eq for each bit of the "state vector"
                (I.e. each bit of the state encoding)
              1 eq for each output

        6. From equations, we can produce circuits and real machines.

II. New Stuff
    A. State Machines & How to build them
       Finishing the example from last time
        The Process:
           1) Draw Diagram following simple rules:
                 A Bubble is a state
                 Outputs may be turned on in a state 
                 (This is part of what makes the state special)
                 States are connected to other states with "Arcs"
                 These arcs are the paths taken when certain conditions 
                 are met.

              Things to keep in mind:
                 The clock - this dictates how long the machine will
                 take in each bubble.
           2) Write out a Table with inputs/states and outputs/next states
              (ALL possible combinations of inputs/states and the outputs/
               next staes that result)
           3) Pick a binary encoding for the states and inputs/outputs
           4) Fill in the table with the encoding.
           5) Write equations for the outputs and each bit of the next state
              in terms of the inputs and current state bits
              (This describes the "combinational logic" part of the machine)
              Try to simplify equations a little
           6) Draw out the combinational logic and attach it to flip-flops.
              1 flip-flop per state bit.
            DONE!

    B. Building Registers from these components
       A 4x2 Register Set

    C. Memory Devices
       Registers (Already Discussed)
       SRAM - A static RAM - Uses Flip-Flops as 
       DRAM - Dynamic Ram uses "charged batteries" to store info.
           DRAMs are organized by Rows and Columns.
           Typically there are more columns than the "word size"
           (I.e. they often look square. This saves row look-up time)

           FP: Must Wait for Data After CAS before New CAS
               A "page" is a row of memory (the bits are the info. on the page)
               This is different than the OS paging!

           EDO: Overlapped CAS changes 

           SDRAM: "Bursts" Data - Next 2-4 CASs are generated internally and
                   data sent. (Doesn't require waiting for external CAS)
                   But does require sychronization with the CPU 
                   (The S stands for Sychronous)
      

    D. Memory Device Overview
       Registers - Really Fast, Uses Flip-Flops and Multiplexors
                   Multiplexors take up a LOT of space for larger registers
         
       SRAM - Fast, uses Flip-Flops and Tri-States. Usually Used As Cache
              (Because a good compromise between space and size)
              
       DRAM - Uses "Transistor batteries" and Charge Checking.Recharging
             Transistor battteries take up MUCH less space than flip-flops, 
             hence more can be packed onto a chip.
             (Each Gate is ~4 transistors. A D-Flip-Flop has ~8 gates = 
              32 transistors...Actuall usually only ~12)
             Usually used as main memory because of high density.
       Variations on DRAM: 
             Fast Page Mode (FP), 
             Extended Data Out (EDO),
             SDRAM

     E. Multiplication
  How is multiplication performed:
       Multiplication: How "fast" is multiplication?

           Multiplying in Decimal:   In Binary:
                   1234                  1011 = 11      Multiplicand
                 * 0221                * 1101 = 13      Multiplier
                 ------                ------
                   1234                  1011
                  2468                  0000
                 2468                  1011
                ------- Add 'em Up    1011
                 272714               -------
                                     10001111 = 143

           How to decompose to something we already know.
           Well, Multiplication by 1 is easy - just copy the number.
                 Multiplication by 0 is easy as well - just write zeros.

           What about the addition steps? We don't have 4-bit adder.
           The solution - an accumulator: add 2-numbers at a time and move left.
           
           How big can the results be? Number size N-bits/digits, 
           results of 2*N-bits/digits.

           Figure 4.25 - Note 64-BIT Adder
              The Multiplicand keeps getting bigger (shifted left)
              Ex: Simple MUX on front of D-Flip-Flops to build a shift reg. 
              The Product is simply the sum of the previous product and the 
              new/improved multiplicand.
              The control just picks whether the new multiplicand or 0 will
              be added.
   
           How long does this take? 
              To multiply 2 N-bit numbers, N cycles are needed.
              (Each cycle is an Add of 2 N-bit numbers and itself 
               may take N*the propagation delay of a bit cell)

 Multiplicand             Multiplier     Accumulated Result
 0000 1011                1101           0000 0000          Start Conditions
 0000 1011<<1=0001 0110   1101>>1=0110   0000 0000+0000 1011 = 0000 1011
 0001 0110<<1=0010 1100   0110>>1=0011   0000 1011+0000 0000X= 0000 1011
 0010 1100<<1=0101 1000   0011>>1=0001   0000 1011+0010 1100 = 0011 0111
 0101 1000<<1=1011 0000   0001>>1=0000** 0011 0111+0101 1000 = 1000 1111

** = Stop Condition (Multiplier of 0) met
 X = Multiplier bit was 0 - Multiply by 0 -> Add 0 

 1. Shifting is easy to do in hardware 
    (Just chained Flips Flops with a load/shift multiplexor in front)
 2. The "condition" of all 0's in the multiplier is easy to detect
 3. It's easy to build a state machine that can control/time these operations

    Revisions:
       1. We only add N-bits at a time. Simplify the adder. Figure 4-28
       2. Get rid of the multiplier register and re-cycle the product register
          (I.e. everytime we destroy 1 bit of the multiplier and add 1 bit to
          the multiplicand) Figure 4-32
       3. Sign: Can be dealt with by special "output" processor 
                that changes the sign of the outputs or by Booth's algorithm

Misc: The 64-bit register explains the mfhi and mflo instructions - moves
      the result from the high/low part of the 64-bit register.

III. Next Time:
     A. Finish Memory / Registers
     B. Multiplication
     C. Evaluations / Attendance Quiz!!!
        Evals: 1. Only I read written
               2. Write up in advnace to leave early
               3. Dept and I get average of bubble sheets
               4. I DO take these seriously, please think about them!
               5. Completly Anonymous / not returned until final grades in.