Appendix B & Chapter 4
Understand Gates
Conversion from Gates to equations and vice versa
Programmable Logic: PLA, ROM, PAL
State Machines, State Diagrams
Be able to make a state machine from a descritions and understand how a pre-made state machine works
Understanding of RS-Latch, D-Latch, and D-Flip-Flop - be able to draw a "timing diagram" of the behavior of each.
Structure of different Rams and Registers
Differences between integer addition, subtraction, and signed vs. unsigned.
Half Adders and Full Adders
Basic integer multiplication algorithm
Improvements and Hardware involved in integer multiplication
ALU construction
Understanding ALU "bit-cells" and how they work
Understand how the parts of the R-format instructions are used (Rs, Rt, Rd, etc.) (by the ALU and registers)
Understand MUXes, Decoders, encoders (be able to build each)
Registers, SRAMs, DRAMs, etc.
How the ALU and registers are connected