Laboratories Teaching Hardware-Software Co-Design

            If you find yourself using any of these materials, please fill out the registration form at http://web.umr.edu/~daryl/nsf-ccli/WebSeminar/models.html or send us email at daryl@umr.edu.  Note: Our materials may not be used for commercial purposes in whole or in part without prior permission from the authors. It may be used for non-commercial purposes but credit must be clearly and completely given.

 

·         Lab 1 - Design of an Eight Bit Latch

This lab is an introduction to Mentor Graphics and the XS40 board. In this lab, students design digital hardware (an eight-bit latch) in Mentor Graphic’s Design Architect and simulate it in QuickSim. After simulation, hardware verification is done using the XS40 board.

Ø      Complete laboratory description

Ø      Useful links

o       Mentor Graphics Tutorials

o       XS40 Schematic available at the end of the XS40 Users Manual.

o       Manual for XS40 board

o       Simulation model of the XS40 Board for lab 1

o       Xess Corporation

 

·         Lab 2 - Introduction to Hardware Software CoSimulation

This lab gives an introduction to Hardware-Software Co-design. Students play the role of a software engineer writing assembly-level code for a processor that hasn’t been built yet. They cosimulate their design in QSPro using a simulation model of the processor to eliminate any potential problems early in the design process. This laboratory utilizes an animated visual model of the inner-workings of the processor, introducing students to processor architecture and giving them a visual “feel” for how a processor works.

Ø      Complete laboratory description

Ø      Useful links

o       Slides: Introduction to the Wimp51

o       Simulation schematic of XS40 board 

o       Wimp51 simulation model

 

·         Lab 3 - Hardware Verification of Software for the Wimp51

This lab is a continuation of the previous lab in which students have already verified a software design through simulation. In this lab, they test their design in hardware using a physical prototype of the processor implemented in an FPGA on the XS40 board. Students encounter an “unexpected” hardware bug and are required to modify their software to work around this bug.

Ø      Complete laboratory description

Ø      Useful links

o       Simulation schematic of XS40 board

o       XS40 Schematic available at the end of the XS40 Users Manual

o       Manual for XS40 board

o       Xess Corporation

o       Wimp51 bit-file

 

·         Lab 4 - Extending the 8051 with External Hardware: An Address Latch and Memory-Mapped Port

In this lab, students play the role of a hardware engineer developing components to allow a microcontroller to use external memory and to create a memory-mapped port for the seven-segment display. To test their hardware early in the design stage, they use an incomplete software model that implements the most important features of the design. After testing their design through simulation, they further verify their design in hardware using the XS40 board.

Ø      Complete laboratory description

Ø      Useful links

o       XS40 Schematic available at the end of the XS40 Users Manual

o       Simulation model of the XS40 Board for lab 4

o       8051 program hex file

 

·         Lab 5 - Creating a Single Chip Memory Space for the 8051

The 8051 on the XS40 board uses a single 32KB block of external SRAM to store both code and data. In this lab, students write an assembly program and develop hardware to partition SRAM for both code and data.  Hardware-Software debugging is facilitated through use of a Tcl/Tk debugger interface for the 8051 VHDL model.

Ø      Complete laboratory description

Ø      Useful links

o       XS40 Schematic available at the end of the XS40 Users Manual

o       Tutorial for uVision 2

o       Tcl/Tk debugger interface for the 8051

o       Example of relocating memory

 

·         Lab 6 - Design with Intellectual Property: Creating a VGA Display

In this lab, students develop a complex design (a VGA display controller) using hardware developed by another company (i.e. using Intellectual Property (IP)). Hardware and software are developed simultaneously and co-simulated using Mentor Graphics.  The complete design is verified in hardware using the XS40 board.

Ø      Complete laboratory description

Ø      Useful links

o       XS40 Schematic available at the end of the XS40 Users Manual

o       VGA Display Adapter core (prepared for Mentor Graphics)

o       Datasheet on VGA Display Adapter core

 

·         Lab 7 - Bi-directional Serial Communication Using Interrupts

Students develop a program to communicate with another processor using the 8051’s on-board UART.  Software is simulated in hardware using a serial-port test module.  The complete design is later verified in hardware using the XS40 board, where two student groups send messages to each other. 

Ø      Complete laboratory description

Ø      Useful links

o       Serial-port Simulation Module (in VHDL)

o       Simulation model of the XS40 Board

 

·         Lab 8 - Interfacing the 8051 With an External Sensor I

In this lab, students learn how to communicate with a networked series of external sensors using the Dallas Semiconductor one-wire protocol. Students write code for the 8051 to read a temperature from the DS1822 1-wire temperature sensor. The design is simulated using a fully functional simulation model of the DS1822.  Later, they verify their design by reading a temperature from a DS1822 hooked to the XS40 board and displaying the temperature on a VGA display using the microcontroller’s UART and a HyperTerminal program.

Ø      Complete laboratory description

Ø      Useful links

o       "Library" of C functions to communicate with a 1-wire device

o       Simulation model of Dallas Semiconductor 1-wire device

o       Datasheet for simulation model of Dallas Semiconductor 1-wire device

o       Serial-port Simulation Module (in VHDL)

 

 

·        Lab 9 - Interfacing the 8051 With an External Sensor II

This lab is similar to the previous lab in which the students communicate with a Dallas Semiconductor 1-wire device.  In this lab, students read a number generated by a synthesizable one-wire pseudo random number generator (OWPRN). Results are displayed on a 7-segment display.  Students write code and develop hardware to complete this function.  The design is simulated in Mentor Graphics and is later tested in hardware using the XS40 board, where the random number generator is synthesized in the on-board FPGA.

Ø      Complete laboratory description

Ø      Useful links

o       Simulation model of the OWPRN

o       Datasheet on the OWPRN

 

·         Lab 10 – Hardware-Software Partitioning

Students consider trade-offs between a hardware- and software-implementation of a PWM like size, cost, speed, overhead, and more.  Students implement and test a hardware and a software PWM, measure quantities needed to evaluate each implementation, and then perform a critical assessment of each aspect of those implementations.

Ø      Complete laboratory description

Ø      Useful links

o       Simulation model of the hardware PWM

o       Datasheet on the PWM

o       Bit-file for hardware PWM implemented in the FPGA of the XS40 board (low frequency)

o       Bit-file for hardware PWM implemented in the FPGA of the XS40 board (high frequency)

o       Output from xmake after creating hardware PWM bit file (the xc4005.par file)

o       Hex file for 8051 program communicating with hardware PWM.

 

·         Semester Project

A semester’s lab course is often completed with a project.  Students apply concepts used in the labs to develop a microcontroller-based embedded system that performs a task of their choosing.  Project guidelines and a sample of students projects are given at the links below.

o        Project guidelines

o        Previous semesters' projects

 

·         Useful Links

Information at the following links may help in completing the above labs.

o        Mentor Graphics Frequently Asked Questions

o        Tutorial for uVision 2

o        Tips and common problems in uVision 2

o        FTP tutorial

o        VHDL Updates

o        Other Resources

 

Send questions via email

Back to the main page