VHDL and Tcl/Tk Models
Developed for the Labs
- 8051 Microcontroller
The most important model developed for this
project is a fully-functional simulation model of the 8051
microcontroller. Features of this model include:
- Clock-cycle accurate
- Supports entire
command set
- 2K internal program
memory
- Supports 64K external
code and data memory range
- Complete interrupt
support
- Timers/counters
- Internal UART
- Four 8-bit I/O ports
- Loads programs from a
compiler-generated Intel Hex-file
- Thoroughly tested
For further information, check out:
- An explanation of the model and of some of
the testing methods.
- The complete VHDL model developed by
UMR.
- Testing methods. The model
was subjected to a large variety of software testing methods. A full
report on testing can be found in
- M. Gemini, Software
Testing Methodologies Applied to Verification of a VHDL Model of the
8051 Microcontroller, Masters thesis, University of Missouri-Rolla,
2000.
- M. Gemini and A.
Miller, "Software Testing Methodologies applied to VHDL
Verification," ISSRE 2000, The Eleventh International Symposium
on Software Reliability ,
Oct. 8-11, 2000.
- 8051 Hardware Debugger Interface
The Hardware Debugger Interface is a set of scripts written
in Tcl/Tk that allows the user to step through their
8051 code instruction-by-instruction or clock-by-clock while viewing what is
going on inside the processor and processor memory and while simultaneously simulating external
hardware. The script works on top of the
Mentor Graphics, issuing commands and reading results directly from their
standard hardware simulation tool. Two versions
are available: One that works with QsPro and includes
a seven-segment display interface,
and one that works with VSim.
For further information, check out:
- A more detailed overview of the interface
and its capabilities.
- The Tcl/Tk
visualization tool
- Publications:
- L. Verma, H. J. Pottinger, and D. G. Beetner, "A
Software Debugger Interface for an 8051 Hardware Model," 2003 Conference on Microelectronic
Systems Education, June 2003.
- L. Verma, D. Beetner, H. Pottinger, “A Tcl/Tk Debugging Interface for a VHDL 8051
Microcontroller Model,” Mentor Graphics Users Group 2003
conference proceedings, 2003.
- L. Verma, Development
of Educational Materials Teaching Hardware-Software Co-Design:
Laboratories and A Debugger Interface for an 8051 VHDL Model,
Masters thesis, University of Missouri-Rolla, 2003.
·
Chapter 3: A hardware-software debugger interface
- WIMP 51
The WIMP 51 is a simplified structural model of the 8051 microcontroller
used to teach concepts of computer organization. It is fully synthesizable
in an Xinlinx SPARTAN FPGA. Its simple structure
allows students to quickly grasp how it works and to modify it to add
functionality. A Tcl/Tk graphical dataflow
visualization tool for Mentor Graphics is included, which allows students
to "see" how instructions are executed and data flows through
the processor at the register level.
For further information, check out:
- A brief explanation.
- The VHDL model and Tcl/Tk
visualization tool
- Publications:
- D. Sullins, Design of an 8051 Compatible Processor
and Simulator for use in Undergraduate Coursework, Masters thesis,
University of Missouri-Rolla, 2002.
- D. Sullins, H. Pottinger, D. Beetner, "The WIMP51:
A Simple Processor and Visualization Tool to Introduce Undergraduates to
Computer Organization," Computers in Education Journal, vol. 13, pp 17-23, Jan. 2003.
- D. Sullins, D. Beetner, H. Pottinger, "Development
of a Simple Processor and Simulator for Use in Undergraduate
Coursework," Proceedings of the 4th European Workshop on
Microelectronics Education - EWME 2002.
- D. Sullins and H. Pottinger, "Animation of a VHDL
Model in Modelsim Using Tcl/Tk,"
Proceedings of the 18th Annual Mentor Graphics Users Group,
October 1-3, 2002, Denver Colorado.
- Synthesizable Model
of a PWM
A
synthesizable VHDL model of a 10-bit PWM, including circuitry to allow easy
interface to the 8051 microcontroller.
The PWM includes a 10-bit user-selectable period and a programmable
dead-zone. Designed for synthesis to the
Xillinx XC4005 and Spartan FPGAs, though should also
work well with other FPGAs.
For further information, check out:
- Simulation Model of the Dallas Semiconductor DS1822 1-wire
temperature sensor
This VHDL model is designed for test of systems built around the Dallas
Semiconductor DS1822 temperature sensor. It performs all the functions of
the DS1822, including 1-wire communication with a host. Device
"ID" can be specified as a generic. "Temperature" is
set through a real input to the model. Obviously, this model is not
synthesizable.
For further information, check out:
- Synthesizable 1-wire random number generator
This model was developed to teach students about the Dallas Semiconductor
1-wire communication protocol and development of hardware-software systems
around such a device. The device may be used in simulations and may be
synthesized in an FPGA to test a design.
- XS40 board
This is not a model, but rather a Mentor
schematic of the XESS XS40 development board to aid creation of software
and hardware using the board.
- VGA control unit for the XS40 board
The VGA control unit works in the FPGA of the Xess
XS40 board and allows the 8051 to interact with a VGA display. This control unit is required for use of
the VGA display with the XS40 board.
- Serial port test module
The serial port test module was developed to allow students to simulate
and debug operation of a standard RS232 serial port. The module transmits
serial data it reads from an ASCII text file. Serial data received by the
module is displayed to the user. Baud rate is set by the user.
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Document maintained by daryl@ece.umr.edu
Last Modified Dec. 2002.